Jaspreet Kaur, Gaurav Mittal
Interpolation filters are integral part of a modern communication transmitter. This paper presents the design and FPGA implementation for a digital up converter or interpolation filter for a WiMAX Communication system. Multistage implementation approach has been used to reduce the hardware requirement. The results have been presented for a xc3sd1800a-4fg676 FPGA device.
English 
Spanish 
Chinese 
Russian 
French 
Japanese 
Portuguese 
Hindi