Abstrakt

Error Detection and Correction In Encoder and Decoder For Nanmemory

V.M. Ramaa Priyaa

Nanotechnology provides smaller, faster and lower energy devices which allow more powerful and compact circuitry. Memory cells have been protected from soft errors for more than a decade, due to the increase in soft error rate in logic circuits, the encoder and decoder circuitry around the memory blocks have susceptible to soft errors as well and must also be protected. An error occurrence in a computer’s memory system that changes an instruction in a program or a data value. A soft error will not damage a system’s hardware. A new approach is introduced to design fault-secure encoder and decoder circuitry for memory designs. The key contribution is identifying and defining a new class of error-correcting codes whose redundancy makes the design of fault-secure detectors (FSD) particularly simple. Euclidean Geometry codes are also called EG-LDPC codes based on the fact that they are low-density parity-check (LDPC)codes.

Haftungsausschluss: Dieser Abstract wurde mit Hilfe von Künstlicher Intelligenz übersetzt und wurde noch nicht überprüft oder verifiziert